module specification

This module extends the digital design techniques learnt at intermediate level to the use of Application Specific Integrated Circuits. It provides an extensive treatment of the use of Virtual Hardware Description Language (VHDL) using the industry's standard (Xilinx/Altera and its associated hardware).

Level 5 – completed CT5051

• Review of Synchronous and Asynchronous sequential systems (race and hazard), Synchronous sequential design, Variable Entered Map (VEM), Synchronous Counter design, Synchronous Sequential Controller Design. (LO1, LO2)

• Register and Register Transfers. Data paths and data flow control. Registers and register manipulations. Register transfer operations including data bus-oriented systems. Register transfer notations, HDL representation. Control of register transfers. Modularity and compositionally, the building blocks of programmable architectures. (LO1, LO2)

• Algorithmic State Machine (ASM) design method. The role of simulation, functional simulation, timing simulation, verification. Design implementation using traditional (schematic diagram) techniques. HDL representation and synthesis of sequential logic including FSMs. Typical design flows from high level models to circuit implementation, structured design methods and convergent designs. Implementation technologies, including FPLAs. (LO1, LO2)

• Computer Aided Design Electronic CAD (ECAD) design cycle: specification capture, behavioural simulation, circuit (schematic) synthesis, schematic (gate level) simulation, netlist abstraction, Programmable logic implementations: ROM, PLA & PAL structures and implementation of logic circuits. Selection of target (e.g. specific FPGA /CPLD) and binding to target architecture, layout and routing, design rule compliance, back annotation and simulation, FPGA /CPLD implementation, circuit test and verification, closing the loop between simulation and test. (LO3, LO4)

• Requirements analysis, partitioning designs into dataflow, system design elaboration and modular design, design refinement, module and system simulation and verification, system implementation, testability and verification.
Complex digital systems, their contents and requirements, Design and implementation methodologies for ASIC technology, Hardware description languages (e.g. VHDL/Verilog), Simulation tools for digital systems. (LO3, LO4)

Students will develop understanding and practical investigative skills based on weekly lectures, tutorials and supervised workshops.  The teaching sessions will utilise examples/case studies as a platform for understanding principles related to the module.

The workshops are provided to support students in gaining practical experience in effective use electronic equipment and simulation tools, within a dedicated laboratory.

Appropriate blended learning approaches and technologies, such as, the University’s VLE, simulation tools and laboratory equipment will be used to facilitate and support student learning.

Students will be encouraged to keep reflective commentaries on their learning activities and tasks that they carry out to complete their work.
 

On successful completion of this module students should be able to:

LO1. Explain the role of Field Programmable Gate Array (FPGA) and similar technologies holistically in the prototyping of digital systems and the influence of manufacturing technology on the accurate design and characterisation of VLSI circuits and systems.
LO2. Understand and use relevant technical literature to select an appropriate Application Specific Integrated Circuit (ASIC) technology to perform in a specific digital application.
LO3. Create, design, test, and document innovative digital (combinational and sequential) system using VHDL and schematic capture and evaluate its function.
LO4. Use a Computer Aided Design (CAD) system to enter, simulate and implement a digital system in an industry standard ASIC technology.

 

CT6053 Digital Systems Applications | London Metropolitan University